Nasir Ali is a quantum hardware–software infrastructure engineer specializing in FPGA- and GPU-accelerated quantum computing systems. He works on real-time quantum error correction (QEC), quantum simulation, and control-system architectures, with hands-on expertise in Xilinx Alveo FPGA platforms, NVIDIA CUDA-Q, and quantum control stacks such as ARTIQ/Sinara. Currently at C-DAC, he leads development of large-scale FPGA-based quantum simulators and low-latency QEC decoding pipelines, including surface-code decoders and distributed multi-FPGA statevector systems. His work bridges quantum physics, high-performance computing, and hardware design for scalable quantum computing infrastructure. 

FPGA Based Quantum Circuit Simulator: Processing 30 Qubit Systems Abstract: This paper presents a field-programmable gate array (FPGA) implementation of a quantum circuit simulator capable of processing 30-qubit systems, representing over 1.07 billion quantum states stored in 8 GB of memory. Built on the Xilinx Alveo U55C platform with High Bandwidth Memory (HBM) technology, our system demonstrates deterministic performance through a 16-bank parallel memory distribution architecture integrated with the Qiskit quantum computing framework [7]. We achieved complete verification across all qubit configurations from 1 to 30 qubits, with execution times ranging from 5 milliseconds to approximately 49 minutes. The simulator supports a comprehensive quantum gate library including single-qubit operations (Hadamard, Pauli gates, rotation gates) and multi-qubit gates (CNOT, controlled-Z, Toffoli) [1]. Our performance analysis reveals distinct operational regimes where FPGA excels for small-scale circuits (1-12 qubits) but faces scalability challenges beyond 15 qubits when compared to GPU architectures. This work establishes FPGA as a practical platform for quantum algorithm development and circuit verification, particularly valuable for applications requiring 1 deterministic timing and energy-efficient computation. The architecture provides clear pathways for expansion to 31+ qubits through memory configuration enhancements. Keywords: FPGA, Quantum Computing, Quantum Simulation, High Bandwidth Memory, HBM, Xilinx Alveo, Quantum Circuit, Qiskit, Hardware Acceleration, Quantum Gates